Hardware Design with VHDL

ECE *443 (3)

The VHDL hardware description language is used for description of digital systems at several levels of complexity, from the system level to the gate level. Descriptions provide a mechanism for documentation, for simulation and for synthesis.

Prerequisite: **338.

Restriction: admitted to School of Engineering.



Prerequisites / Corequisites

Intermediate Logic Design - ECE **338



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