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The VHDL hardware description language is used for description of digital systems at several levels of complexity, from the system level to the gate level. Descriptions provide a mechanism for documentation, for simulation and for synthesis.
Prerequisite: **338.
Restriction: admitted to School of Engineering.
Intermediate Logic Design - ECE **338
MSC 11 6325
1 University of New Mexico
Albuquerque, NM 87131
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